2 +----------------------------------------------------------------------+
4 +----------------------------------------------------------------------+
5 | Copyright (c) 2008 The PHP Group |
6 +----------------------------------------------------------------------+
7 | This source file is subject to version 3.01 of the PHP license, |
8 | that is bundled with this package in the file LICENSE, and is |
9 | available through the world-wide-web at the following url: |
10 | http://www.php.net/license/3_01.txt |
11 | If you did not receive a copy of the PHP license and are unable to |
12 | obtain it through the world-wide-web, please send a note to |
13 | license@php.net so we can mail you a copy immediately. |
14 +----------------------------------------------------------------------+
15 | The following code was ported from the PostgreSQL project, please |
16 | see appropriate copyright notices that follow. |
17 | Initial conversion by Brian Shire <shire@php.net> |
18 +----------------------------------------------------------------------+
22 /* $Id: pgsql_s_lock.h,v 3.3.2.1 2008/05/11 18:57:00 rasmus Exp $ */
24 /*-------------------------------------------------------------------------
27 * Hardware-dependent implementation of spinlocks.
29 * NOTE: none of the macros in this file are intended to be called directly.
30 * Call them through the hardware-independent macros in spin.h.
32 * The following hardware-dependent macros must be provided for each
35 * void S_INIT_LOCK(slock_t *lock)
36 * Initialize a spinlock (to the unlocked state).
38 * void S_LOCK(slock_t *lock)
39 * Acquire a spinlock, waiting if necessary.
40 * Time out and abort() if unable to acquire the lock in a
41 * "reasonable" amount of time --- typically ~ 1 minute.
43 * void S_UNLOCK(slock_t *lock)
44 * Unlock a previously acquired lock.
46 * bool S_LOCK_FREE(slock_t *lock)
47 * Tests if the lock is free. Returns TRUE if free, FALSE if locked.
48 * This does *not* change the state of the lock.
50 * void SPIN_DELAY(void)
51 * Delay operation to occur inside spinlock wait loop.
53 * Note to implementors: there are default implementations for all these
54 * macros at the bottom of the file. Check if your platform can use
55 * these or needs to override them.
57 * Usually, S_LOCK() is implemented in terms of an even lower-level macro
60 * int TAS(slock_t *lock)
61 * Atomic test-and-set instruction. Attempt to acquire the lock,
62 * but do *not* wait. Returns 0 if successful, nonzero if unable
63 * to acquire the lock.
65 * TAS() is NOT part of the API, and should never be called directly.
67 * CAUTION: on some platforms TAS() may sometimes report failure to acquire
68 * a lock even when the lock is not locked. For example, on Alpha TAS()
69 * will "fail" if interrupted. Therefore TAS() should always be invoked
70 * in a retry loop, even if you are certain the lock is free.
72 * ANOTHER CAUTION: be sure that TAS() and S_UNLOCK() represent sequence
73 * points, ie, loads and stores of other values must not be moved across
74 * a lock or unlock. In most cases it suffices to make the operation be
75 * done through a "volatile" pointer.
77 * On most supported platforms, TAS() uses a tas() function written
78 * in assembly language to execute a hardware atomic-test-and-set
79 * instruction. Equivalent OS-supplied mutex routines could be used too.
81 * If no system-specific TAS() is available (ie, HAVE_SPINLOCKS is not
82 * defined), then we fall back on an emulation that uses SysV semaphores
83 * (see spin.c). This emulation will be MUCH MUCH slower than a proper TAS()
84 * implementation, because of the cost of a kernel call per lock or unlock.
85 * An old report is that Postgres spends around 40% of its time in semop(2)
86 * when using the SysV semaphore code.
89 * Portions Copyright (c) 1996-2006, PostgreSQL Global Development Group
90 * Portions Copyright (c) 1994, Regents of the University of California
92 * $PostgreSQL: pgsql/src/include/storage/s_lock.h,v 1.157 2006/06/07 22:24:45 momjian Exp $
94 *-------------------------------------------------------------------------
99 /** APC namespace protection ************************************************/
100 /* hack to protect against any possible runtime namespace collisions...*/
101 #define pg_usleep apc_spin_pg_usleep
102 #define s_lock apc_spin_s_lock
103 #define spins_per_delay apc_spin_spins_per_delay
104 /****************************************************************************/
107 /* #include "storage/pg_sema.h" -- Removed for APC */
109 #define HAVE_SPINLOCKS 1 /* -- Added for APC */
111 #ifdef HAVE_SPINLOCKS /* skip spinlocks if requested */
114 #if defined(__GNUC__) || defined(__ICC)
115 /*************************************************************************
116 * All the gcc inlines
117 * Gcc consistently defines the CPU as __cpu__.
118 * Other compilers use __cpu or __cpu__ so we test for both in those cases.
122 * Standard gcc asm format (assuming "volatile slock_t *lock"):
124 __asm__ __volatile__(
128 : "=r"(_res), "+m"(*lock) // return register, in/out lock value
129 : "r"(lock) // lock pointer, in input register
130 : "memory", "cc"); // show clobbered registers here
132 * The output-operands list (after first colon) should always include
133 * "+m"(*lock), whether or not the asm code actually refers to this
134 * operand directly. This ensures that gcc believes the value in the
135 * lock variable is used and set by the asm code. Also, the clobbers
136 * list (after third colon) should always include "memory"; this prevents
137 * gcc from thinking it can cache the values of shared-memory fields
138 * across the asm code. Add "cc" if your asm code changes the condition
139 * code register, and also list any temp registers the code uses.
144 #ifdef __i386__ /* 32-bit i386 */
145 #define HAS_TEST_AND_SET
147 typedef unsigned char slock_t;
149 #define TAS(lock) tas(lock)
151 static __inline__ int
152 tas(volatile slock_t *lock)
154 register slock_t _res = 1;
157 * Use a non-locking test before asserting the bus lock. Note that the
158 * extra test appears to be a small loss on some x86 platforms and a small
159 * win on others; it's by no means clear that we should keep it.
161 __asm__ __volatile__(
167 : "+q"(_res), "+m"(*lock)
173 #define SPIN_DELAY() spin_delay()
175 static __inline__ void
179 * This sequence is equivalent to the PAUSE instruction ("rep" is
180 * ignored by old IA32 processors if the following instruction is
181 * not a string operation); the IA-32 Architecture Software
182 * Developer's Manual, Vol. 3, Section 7.7.2 describes why using
183 * PAUSE in the inner loop of a spin lock is necessary for good
186 * The PAUSE instruction improves the performance of IA-32
187 * processors supporting Hyper-Threading Technology when
188 * executing spin-wait loops and other routines where one
189 * thread is accessing a shared lock or semaphore in a tight
190 * polling loop. When executing a spin-wait loop, the
191 * processor can suffer a severe performance penalty when
192 * exiting the loop because it detects a possible memory order
193 * violation and flushes the core processor's pipeline. The
194 * PAUSE instruction provides a hint to the processor that the
195 * code sequence is a spin-wait loop. The processor uses this
196 * hint to avoid the memory order violation and prevent the
197 * pipeline flush. In addition, the PAUSE instruction
198 * de-pipelines the spin-wait loop to prevent it from
199 * consuming execution resources excessively.
201 __asm__ __volatile__(
205 #endif /* __i386__ */
208 #ifdef __x86_64__ /* AMD Opteron, Intel EM64T */
209 #define HAS_TEST_AND_SET
211 typedef unsigned char slock_t;
213 #define TAS(lock) tas(lock)
215 static __inline__ int
216 tas(volatile slock_t *lock)
218 register slock_t _res = 1;
221 * On Opteron, using a non-locking test before the locking instruction
222 * is a huge loss. On EM64T, it appears to be a wash or small loss,
223 * so we needn't bother to try to distinguish the sub-architectures.
225 __asm__ __volatile__(
228 : "+q"(_res), "+m"(*lock)
234 #define SPIN_DELAY() spin_delay()
236 static __inline__ void
240 * Adding a PAUSE in the spin delay loop is demonstrably a no-op on
241 * Opteron, but it may be of some use on EM64T, so we keep it.
243 __asm__ __volatile__(
247 #endif /* __x86_64__ */
250 #if defined(__ia64__) || defined(__ia64) /* Intel Itanium */
251 #define HAS_TEST_AND_SET
253 typedef unsigned int slock_t;
255 #define TAS(lock) tas(lock)
257 #ifndef __INTEL_COMPILER
259 static __inline__ int
260 tas(volatile slock_t *lock)
264 __asm__ __volatile__(
266 : "=r"(ret), "+m"(*lock)
272 #else /* __INTEL_COMPILER */
274 static __inline__ int
275 tas(volatile slock_t *lock)
279 ret = _InterlockedExchange(lock,1); /* this is a xchg asm macro */
284 #endif /* __INTEL_COMPILER */
285 #endif /* __ia64__ || __ia64 */
288 #if defined(__arm__) || defined(__arm)
289 #define HAS_TEST_AND_SET
291 typedef unsigned char slock_t;
293 #define TAS(lock) tas(lock)
295 static __inline__ int
296 tas(volatile slock_t *lock)
298 register slock_t _res = 1;
300 __asm__ __volatile__(
301 " swpb %0, %0, [%2] \n"
302 : "+r"(_res), "+m"(*lock)
311 /* S/390 and S/390x Linux (32- and 64-bit zSeries) */
312 #if defined(__s390__) || defined(__s390x__)
313 #define HAS_TEST_AND_SET
315 typedef unsigned int slock_t;
317 #define TAS(lock) tas(lock)
319 static __inline__ int
320 tas(volatile slock_t *lock)
324 __asm__ __volatile__(
326 : "+d"(_res), "+m"(*lock)
332 #endif /* __s390__ || __s390x__ */
335 #if defined(__sparc__) /* Sparc */
336 #define HAS_TEST_AND_SET
338 typedef unsigned char slock_t;
340 #define TAS(lock) tas(lock)
342 static __inline__ int
343 tas(volatile slock_t *lock)
345 register slock_t _res;
348 * See comment in /pg/backend/port/tas/solaris_sparc.s for why this
349 * uses "ldstub", and that file uses "cas". gcc currently generates
350 * sparcv7-targeted binaries, so "cas" use isn't possible.
352 __asm__ __volatile__(
353 " ldstub [%2], %0 \n"
354 : "=r"(_res), "+m"(*lock)
360 #endif /* __sparc__ */
364 #if defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(__powerpc64__)
365 #define HAS_TEST_AND_SET
367 #if defined(__ppc64__) || defined(__powerpc64__)
368 typedef unsigned long slock_t;
370 typedef unsigned int slock_t;
373 #define TAS(lock) tas(lock)
375 * NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
376 * an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
378 static __inline__ int
379 tas(volatile slock_t *lock)
384 __asm__ __volatile__(
398 : "=&r"(_t), "=r"(_res), "+m"(*lock)
404 /* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction */
405 #define S_UNLOCK(lock) \
408 __asm__ __volatile__ (" sync \n"); \
409 *((volatile slock_t *) (lock)) = 0; \
415 /* Linux Motorola 68k */
416 #if (defined(__mc68000__) || defined(__m68k__)) && defined(__linux__)
417 #define HAS_TEST_AND_SET
419 typedef unsigned char slock_t;
421 #define TAS(lock) tas(lock)
423 static __inline__ int
424 tas(volatile slock_t *lock)
428 __asm__ __volatile__(
432 : "=d"(rv), "+m"(*lock)
438 #endif /* (__mc68000__ || __m68k__) && __linux__ */
442 * VAXen -- even multiprocessor ones
443 * (thanks to Tom Ivar Helbekkmo)
446 #define HAS_TEST_AND_SET
448 typedef unsigned char slock_t;
450 #define TAS(lock) tas(lock)
452 static __inline__ int
453 tas(volatile slock_t *lock)
457 __asm__ __volatile__(
459 " bbssi $0, (%2), 1f \n"
462 : "=&r"(_res), "+m"(*lock)
471 #if defined(__ns32k__) /* National Semiconductor 32K */
472 #define HAS_TEST_AND_SET
474 typedef unsigned char slock_t;
476 #define TAS(lock) tas(lock)
478 static __inline__ int
479 tas(volatile slock_t *lock)
483 __asm__ __volatile__(
486 : "=r"(_res), "+m"(*lock)
492 #endif /* __ns32k__ */
495 #if defined(__alpha) || defined(__alpha__) /* Alpha */
497 * Correct multi-processor locking methods are explained in section 5.5.3
498 * of the Alpha AXP Architecture Handbook, which at this writing can be
499 * found at ftp://ftp.netbsd.org/pub/NetBSD/misc/dec-docs/index.html.
500 * For gcc we implement the handbook's code directly with inline assembler.
502 #define HAS_TEST_AND_SET
504 typedef unsigned long slock_t;
506 #define TAS(lock) tas(lock)
508 static __inline__ int
509 tas(volatile slock_t *lock)
511 register slock_t _res;
513 __asm__ __volatile__(
525 : "=&r"(_res), "+m"(*lock)
531 #define S_UNLOCK(lock) \
534 __asm__ __volatile__ (" mb \n"); \
535 *((volatile slock_t *) (lock)) = 0; \
538 #endif /* __alpha || __alpha__ */
541 #if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */
542 /* Note: on SGI we use the OS' mutex ABI, see below */
543 /* Note: R10000 processors require a separate SYNC */
544 #define HAS_TEST_AND_SET
546 typedef unsigned int slock_t;
548 #define TAS(lock) tas(lock)
550 static __inline__ int
551 tas(volatile slock_t *lock)
553 register volatile slock_t *_l = lock;
557 __asm__ __volatile__(
569 : "=&r" (_res), "=&r" (_tmp), "+R" (*_l)
575 /* MIPS S_UNLOCK is almost standard but requires a "sync" instruction */
576 #define S_UNLOCK(lock) \
579 __asm__ __volatile__( \
582 " .set noreorder \n" \
586 *((volatile slock_t *) (lock)) = 0; \
589 #endif /* __mips__ && !__sgi */
592 /* These live in s_lock.c, but only for gcc */
595 #if defined(__m68k__) && !defined(__linux__) /* non-Linux Motorola 68k */
596 #define HAS_TEST_AND_SET
598 typedef unsigned char slock_t;
602 #endif /* __GNUC__ */
607 * ---------------------------------------------------------------------
608 * Platforms that use non-gcc inline assembly:
609 * ---------------------------------------------------------------------
612 #if !defined(HAS_TEST_AND_SET) /* We didn't trigger above, let's try here */
615 #if defined(USE_UNIVEL_CC) /* Unixware compiler */
616 #define HAS_TEST_AND_SET
618 typedef unsigned char slock_t;
620 #define TAS(lock) tas(lock)
623 tas(volatile slock_t *s_lock)
625 /* UNIVEL wants %mem in column 1, so we don't pg_indent this file */
635 #endif /* defined(USE_UNIVEL_CC) */
638 #if defined(__alpha) || defined(__alpha__) /* Tru64 Unix Alpha compiler */
640 * The Tru64 compiler doesn't support gcc-style inline asm, but it does
641 * have some builtin functions that accomplish much the same results.
642 * For simplicity, slock_t is defined as long (ie, quadword) on Alpha
643 * regardless of the compiler in use. LOCK_LONG and UNLOCK_LONG only
644 * operate on an int (ie, longword), but that's OK as long as we define
645 * S_INIT_LOCK to zero out the whole quadword.
647 #define HAS_TEST_AND_SET
649 typedef unsigned long slock_t;
651 #include <alpha/builtins.h>
652 #define S_INIT_LOCK(lock) (*(lock) = 0)
653 #define TAS(lock) (__LOCK_LONG_RETRY((lock), 1) == 0)
654 #define S_UNLOCK(lock) __UNLOCK_LONG(lock)
656 #endif /* __alpha || __alpha__ */
659 #if defined(__hppa) || defined(__hppa__) /* HP PA-RISC, GCC and HP compilers */
663 * See src/backend/port/hpux/tas.c.template for details about LDCWX. Because
664 * LDCWX requires a 16-byte-aligned address, we declare slock_t as a 16-byte
665 * struct. The active word in the struct is whichever has the aligned address;
666 * the other three words just sit at -1.
668 * When using gcc, we can inline the required assembly code.
670 #define HAS_TEST_AND_SET
677 #define TAS_ACTIVE_WORD(lock) ((volatile int *) (((long) (lock) + 15) & ~15))
679 #if defined(__GNUC__)
681 static __inline__ int
682 tas(volatile slock_t *lock)
684 volatile int *lockword = TAS_ACTIVE_WORD(lock);
685 register int lockval;
687 __asm__ __volatile__(
688 " ldcwx 0(0,%2),%0 \n"
689 : "=r"(lockval), "+m"(*lockword)
692 return (lockval == 0);
695 #endif /* __GNUC__ */
697 #define S_UNLOCK(lock) (*TAS_ACTIVE_WORD(lock) = -1)
699 #define S_INIT_LOCK(lock) \
701 volatile slock_t *lock_ = (lock); \
702 lock_->sema[0] = -1; \
703 lock_->sema[1] = -1; \
704 lock_->sema[2] = -1; \
705 lock_->sema[3] = -1; \
708 #define S_LOCK_FREE(lock) (*TAS_ACTIVE_WORD(lock) != 0)
710 #endif /* __hppa || __hppa__ */
713 #if defined(__hpux) && defined(__ia64) && !defined(__GNUC__)
715 #define HAS_TEST_AND_SET
717 typedef unsigned int slock_t;
719 #include <ia64/sys/inline.h>
720 #define TAS(lock) _Asm_xchg(_SZ_W, lock, 1, _LDHINT_NONE)
722 #endif /* HPUX on IA64, non gcc */
725 #if defined(__sgi) /* SGI compiler */
728 * slock_t is defined as a unsigned long. We use the standard SGI
731 * The following comment is left for historical reasons, but is probably
732 * not a good idea since the mutex ABI is supported.
734 * This stuff may be supplemented in the future with Masato Kataoka's MIPS-II
735 * assembly from his NECEWS SVR4 port, but we probably ought to retain this
736 * for the R3000 chips out there.
738 #define HAS_TEST_AND_SET
740 typedef unsigned long slock_t;
743 #define TAS(lock) (test_and_set(lock,1))
744 #define S_UNLOCK(lock) (test_then_and(lock,0))
745 #define S_INIT_LOCK(lock) (test_then_and(lock,0))
746 #define S_LOCK_FREE(lock) (test_then_add(lock,0) == 0)
750 #if defined(sinix) /* Sinix */
752 * SINIX / Reliant UNIX
753 * slock_t is defined as a struct abilock_t, which has a single unsigned long
754 * member. (Basically same as SGI)
756 #define HAS_TEST_AND_SET
758 #include "abi_mutex.h"
759 typedef abilock_t slock_t;
761 #define TAS(lock) (!acquire_lock(lock))
762 #define S_UNLOCK(lock) release_lock(lock)
763 #define S_INIT_LOCK(lock) init_lock(lock)
764 #define S_LOCK_FREE(lock) (stat_lock(lock) == UNLOCKED)
768 #if defined(_AIX) /* AIX */
772 #define HAS_TEST_AND_SET
774 typedef unsigned int slock_t;
776 #define TAS(lock) _check_lock(lock, 0, 1)
777 #define S_UNLOCK(lock) _clear_lock(lock, 0)
781 #if defined (nextstep) /* Nextstep */
782 #define HAS_TEST_AND_SET
784 typedef struct mutex slock_t;
786 #define APC_SLOCK_NONBLOCKING_LOCK_AVAILABLE 0 /* -- APC: non-blocking lock not available in this case -- */
788 #define S_LOCK(lock) mutex_lock(lock)
789 #define S_UNLOCK(lock) mutex_unlock(lock)
790 #define S_INIT_LOCK(lock) mutex_init(lock)
791 /* For Mach, we have to delve inside the entrails of `struct mutex'. Ick! */
792 #define S_LOCK_FREE(alock) ((alock)->lock == 0)
793 #endif /* nextstep */
796 /* These are in s_lock.c */
799 #if defined(sun3) /* Sun3 */
800 #define HAS_TEST_AND_SET
802 typedef unsigned char slock_t;
806 #if defined(__sun) && (defined(__i386) || defined(__x86_64__) || defined(__sparc__) || defined(__sparc))
807 #define HAS_TEST_AND_SET
809 #if defined(__i386) || defined(__x86_64__) || defined(__sparcv9) || defined(__sparcv8plus)
810 typedef unsigned int slock_t;
812 typedef unsigned char slock_t;
815 extern slock_t pg_atomic_cas(volatile slock_t *lock, slock_t with,
818 #define TAS(a) (pg_atomic_cas((a), 1, 0) != 0)
822 #ifdef WIN32_ONLY_COMPILER
823 typedef LONG slock_t;
825 #define HAS_TEST_AND_SET
826 #define TAS(lock) (InterlockedCompareExchange(lock, 1, 0))
828 #define SPIN_DELAY() spin_delay()
830 static __forceinline void
833 /* See comment for gcc code. Same code, MASM syntax */
840 #endif /* !defined(HAS_TEST_AND_SET) */
843 /* Blow up if we didn't have any way to do spinlocks */
844 #ifndef HAS_TEST_AND_SET
845 /* -- APC: We have better options in APC than this, that should be specified explicitly so just fail out and notify the user -- */
846 #error Spin locking is not available on your platform, please select another locking method (see ./configure --help).
847 /* #error PostgreSQL does not have native spinlock support on this platform. To continue the compilation, rerun configure using --disable-spinlocks. However, performance will be poor. Please report this to pgsql-bugs@postgresql.org. */
851 #else /* !HAVE_SPINLOCKS */
855 * Fake spinlock implementation using semaphores --- slow and prone
856 * to fall foul of kernel limits on number of semaphores, so don't use this
857 * unless you must! The subroutines appear in spin.c.
860 /* -- Removed for APC
861 typedef PGSemaphoreData slock_t;
863 extern bool s_lock_free_sema(volatile slock_t *lock);
864 extern void s_unlock_sema(volatile slock_t *lock);
865 extern void s_init_lock_sema(volatile slock_t *lock);
866 extern int tas_sema(volatile slock_t *lock);
868 #define S_LOCK_FREE(lock) s_lock_free_sema(lock)
869 #define S_UNLOCK(lock) s_unlock_sema(lock)
870 #define S_INIT_LOCK(lock) s_init_lock_sema(lock)
871 #define TAS(lock) tas_sema(lock)
874 #endif /* HAVE_SPINLOCKS */
878 * Default Definitions - override these above as needed.
881 #define APC_SLOCK_NONBLOCKING_LOCK_AVAILABLE 1 /* -- APC: Non-blocking lock available for this case -- */
884 #define S_LOCK(lock) \
887 s_lock((lock), __FILE__, __LINE__); \
891 #if !defined(S_LOCK_FREE)
892 #define S_LOCK_FREE(lock) (*(lock) == 0)
893 #endif /* S_LOCK_FREE */
895 #if !defined(S_UNLOCK)
896 #define S_UNLOCK(lock) (*((volatile slock_t *) (lock)) = 0)
897 #endif /* S_UNLOCK */
899 #if !defined(S_INIT_LOCK)
900 #define S_INIT_LOCK(lock) S_UNLOCK(lock)
901 #endif /* S_INIT_LOCK */
903 #if !defined(SPIN_DELAY)
904 #define SPIN_DELAY() ((void) 0)
905 #endif /* SPIN_DELAY */
908 extern int tas(volatile slock_t *lock); /* in port/.../tas.s, or
911 #define TAS(lock) tas(lock)
916 * Platform-independent out-of-line support routines
918 extern void s_lock(volatile slock_t *lock, const char *file, int line);
920 /* Support for dynamic adjustment of spins_per_delay */
921 #define DEFAULT_SPINS_PER_DELAY 100
923 #if 0 /* -- Removed from APC use -- */
924 extern void set_spins_per_delay(int shared_spins_per_delay);
925 extern int update_spins_per_delay(int shared_spins_per_delay);
928 #endif /* S_LOCK_H */